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Richard Walsh
Research Director, Technical Computing, IDC |
Richard Walsh, Research Director in IDC's High Performance and Technical Computing Group, is charged with providing technical depth and direction to IDC's hardware and software research in the HPC market space. Mr. Walsh has more than 20 years of study and experience with HPC hardware and software component technologies, applications support and performance optimization, parallel programming, computational research, teaching, HPC system acquisition, installation, and acceptance. He has direct HPC experience in the areas of computational chemistry and finance, custom vector and MPP systems, and commodity cluster specification, acquisition, installation, and support.
Prior to joining IDC, Mr. Walsh was employed at Network Computing Services, Inc. and the Army High Performance Computing Research Center (AHPCRC) in Minneapolis. Mr. Walsh hold's a bachelor's degree in chemistry from Carleton College, and master's degree in the management of technology from the University of Minnesota. |
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Earl Joseph
Ph.D., Program Vice President, High-Performance Computing, IDC |
Earl Joseph, Program Vice President of IDC's High-Performance Systems, drives research and consulting efforts associated with the United States, Europe and Asia-Pacific markets for technical servers and supercomputers. This research includes market sizing, market share, segmentation, tracking, trending, and vendor analysis for the multi-user technical server technology. Dr. Joseph advises IDC clients on the competitive, managerial, technological, integration and implementation issues for technical servers. Dr. Joseph is also heading up IDC's high-end HPC user forum activities.
Dr. Joseph's areas of expertise include technical computers from entry-level servers to high-end capability supercomputers, software, storage and networking solutions for technical computing. He has worked for four technical computing companies in multiple marketing and R&D roles. Dr. Joseph has a strong background in computer technologies and future directions in technical computing. Prior to joining IDC, Dr. Joseph spent his 17 year career in IT in the HPC market space, most recently at SGI and Cray Research. Dr. Joseph has recently worked closely with the leading HPC users around the world on their current and future market requirements.
Dr. Joseph holds a Ph.D. from the University of Minnesota where his research focus was the strategic management of high technology firms, and an undergraduate degree in business and technology from the University of Minnesota. |
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David Scott
Petascale Product Line Architect, Intel Corporation |
Dr. David Scott is the Petascale Product Line Architect for Intel Corporation. He is responsible for formulating and driving Intel strategy for developing the technology needed for high end computing, including processors, platforms, interconnect, and software. He is Intel’s interface to the programs around the world that are developing systems that scale to a Petaflop and beyond.
Dr. Scott joined Intel in 1985, developing algorithms and math libraries for a sequence of distributed memory message passing computers, culminating in the first teraflop on the Linpack benchmark in 1996. He worked for five years in the Floating Point Center of Expertise, helping to improve floating-point design and validation for all of Intel’s 32 and 64-bit processor projects. He spent three years in Singapore supporting High Performance Computing in the Asia-Pacific region, before returning to Oregon to take his current position in July 2006.
David received his PhD in Numerical Analysis from UC Berkeley in 1978. He was a research scientist at the Oak Ridge National Lab for 3 years and taught in the Computer Sciences department of the University of Texas for four years before joining Intel. While working for Intel, he received his MBA from the University of Oregon in 1990. |
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Andrew Pletcher
Technical Marketing Engineer, Cisco Systems Inc. |
Andrew Pletcher is a Senior Technical Marketing Engineer in the Server Access and Virtualization Business Unit at Cisco Systems. In his role Andrew is recognized as one of the high performance computing and low latency experts at Cisco whether this is in isolated high performance computing environments or in today and tomorrows. His area of expertise includes application performance and communication characterization, data delivery mechanism and impact to application performance and host side acceleration for Gigabit Ethernet, 10 Gigabit Ethernet and InfiniBand.
Andrew in an 8+ year veteran of Cisco and has been focusing on high performance and low latency computing for the past 6+ years with a number of key roles in hardware, software and systems architecture development and standardization for low latency and high performance computing.
Prior to joining Cisco, Andrew worked as lead engineer for 3Com Corporation in their interoperability Lab, 3Com’s customer facing proof of concept lab. |
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Merle E. Giles
Director Private Sector Program, National Centre for Supercomputing Applications |
Merle Giles is Director of the Private Sector Program (PSP) at the National Center for Supercomputing Applications (NCSA) at the University of Illinois at Urbana-Champaign (UIUC). NCSA is one of the five original centers in the National Science Foundation's (NSF) Supercomputer Centers Program, opening its doors in January 1986.
Giles brings more than 30 years’ business experience to NCSA. He led UIUC’s Executive MBA to international stature, achieving a #1 ranking among US public university EMBA programs in London's 2002 FINANCIAL TIMES. As Executive MBA director, he and teams of executives and faculty consulted at major international companies, including BASF, Bertelsmann, Caterpillar, Deere, Disney, Deutsche Telekom, Lufthansa, Porsche, Procter & Gamble, Siemens, Volkswagen and others. Giles earlier served as president and CEO of Sheridan Bank of Peoria IL (later First of America Bank-Peoria), as CFO of Star Transport, Inc. (a Morton IL transportation company serving the eastern one-half of the United States) and as a real estate broker/owner.
Giles earned an MBA from the University of Illinois at Urbana-Champaign and a BS in accounting and business administration from Illinois State University. He is an alumnus of the Stonier Graduate School of Banking at the University of Delaware and holds a CPA certificate.
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이상문 박사
HPC Principle Engineer, Technology Strategy Office, Samsung Electronics CO., LTD. |
| TBD |
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Dennis Ang
General Manager for HPC, HP |
| Dennis is responsible for the High-Performance Computing (HPC) business in Asia-Pacific and Japan Region. In this role Dennis helps to define the HPC opportunities and execute business plans in close collaboration with partners and customers. His career in IT span across 20 years. He joined Hewlett-Packard in 2001 and has held business development and management positions in their Technology Solutions Group. |
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Kyril Faenov
, Microsoft Corporation |
| TBD |
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조상현 박사
, 한국생산기술연구원(KITECH) |
Dr. Sang-Hyun Cho is the senior researcher of Digital Design Center of KITECH(Korean Institute of Technology), and the main(chief) developer of ISC(Internet Simulation Center) at KITECH. He develops web-based integrated simulation systems to provide multi-purpose simulation tools to small and medium businesses in Korea. Dr. Sang-Hyun Cho has been developing simulation software based on the thermal and micro-structural analysis for casting industries for the last 8 years and applying parallelization schemes to his codes. He worked as a key technical member of clustering center in ISC to build whole system structure and service strategy which will lead a new HPC business model by providing online simulation systems to small and medium business. Sang-Hyun Cho holds a Ph.D degree in Metallurgy.
1989년-1994년8월 고려대학교 금속공학과 학사
1995년4월-1997년3월 동경대학교 대학원 금속공학과 석사
1997년4월-2000년3월 동경대학교 대학원 금속공학과 박사
2000년8월-현재 한국생산기술연구원
주된 개발 분야
- 열전달 시뮬레이션 기술 개발
- 금속조직예측 시뮬레이션 기술 개발
- 병렬화 기술개발
- 웹과 HPC가 결합된 유비쿼터스형 시뮬레이션 지원 시스템 개발
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김세호
교수, 자동차산업기계공학부, 대구대학교, 대구대학교 |
김세호 (공학박사)
대구대학교 자동차·산업·기계공학부 조교수
학력
1989.2 - 1993.2 KAIST 정밀공학과 (공학사)
1993.3 - 1995.2 KAIST 정밀공학과 (공학석사)
1995.3 - 2002.2 KAIST 기계공학과 (공학박사)
연구경력
1998.1 - 1999.1 일본 기계기술연구소 ITIT 초빙 연구원
2002.2 - 2004.2 현대자동차 선행해석팀 선임연구원
2004.3 - 대구대학교 전임강사, 조교수
연구분야
- 전산고체역학
- 프레스 금형 설계/CAE
- 차량/구조 충돌관련 설계/CAE
- 경량/기능 금속소재 성형 및 부품화
- 구조 경량화 및 최적화
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Deepak Setty
Regional Manager, HPC, Asia Pacific Operations, Microsoft, Microsoft |
| Deepak Setty leads the HPC initiative at Microsoft for Asia Pacific region and is responsible for sales, marketing, product definition and strategic collaborations. Deepak has been actively engaged in HPC domain for the last 5+ years between Europe and Asia. Deepak has a special interest in ramping adoption of technical computing in the commercial sector and building an outreach into the Asian research and academic institutions. |
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Nelson Dias
Executive Vice President - Asia Pacific, Altair Engineering, Altair Engineering |
Mr. Nelson Dias is the Executive Vice President-Asia Pacific, Altair Engineering. He is responsible for overall revenue and profitability; this involves international customer support, software development, sales and marketing efforts for the company in the Asia-Pacific region. Mr. Dias has played a key role in designing the business strategy and executing aggressive marketing plans for the company including push into new verticals.
Mr. Dias has about two decades of experience in Product Lifecycle Management industry. Prior to Altair, he worked for UGS, SDRC, Tata Elxsi and International Data Management (IDM). Mr. Dias holds a Bachelor’s degree in Computer Science (Engineering). |
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Maurice Patel
Head of Industry Management, Media & Entertainment, Autodesk, Inc. |
Maurice Patel is head of industry management for Autodesk’s Media & Entertainment business. He is responsible for the company’s presence across the film, television, games and design visualization segments. He also leads marketing planning and analytics efforts.
A noted authority on media and entertainment trends, Maurice is a frequent public speaker. He is regularly called upon to share his expertise on topics ranging from digital cinema, digital intermediates and digital lifelike environments, to the future of visual effects and Bollywood’s growing footprint. Maurice has keynoted at FICCI FRAMES in Mumbai, and has presented at countless industry events, including The Hollywood Post Alliance (HPA) Technology Retreat, Digital Hollywood, The Entertainment Technology Alliance Conference, The Society of Motion Picture and Television Engineers (SMPTE) Conference and The National Association of Broadcasters (NAB) Convention.
Maurice joined Autodesk in March 2001. A graduate of Imperial College of Science and Technology, London, UK, Maurice has worked in digital post production since 1995 when he joined Avid Technology as product specialist. He later became industry specialist for the company. |
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원영수
Vice President / Business Operation, ATES Co. Ltd. |
원영수 (Young S. WON)는 CFD 연구로 석사학위 취득 후, 육군사관학교 교수부 기계공학과에서 4년간 전임강사 역임.
이후, 삼성종합기술원 중공업 연구소에서 CFD 연구원 근무, 삼성 SDS에서 GIS, MPP, Security 등 IT 사업 및 CAE 사업총괄 / 슈퍼컴 사업총괄 역임.
CFD분야 약 20년간 종사, STAR-CD, SC/Tetra, ICEM CFD, FLUENT, CFX 등 CFD 사업 총괄
2009년 Marquis 세계 인명사전 Who's Who in the world에 등재 확정 됨.
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